Regular
ADCADC AND OTHER IMAGE SENSOR BLOCKSACTIVE PIXEL SENSOR APSAPS/CCD DEFECTS RATESASICAND PROCESSES
CMOS IMAGE SENSORSCOMPUTER VISIONCALIBRATION TARGETCAMERACMOS IMAGE SENSOR
DARK SHOT NOISEDATA REDUCTION
ELECTRON BEAM DETECTORENDOSCOPY
FILTER SELECTIONFAR-INFRAREDFULL FRAME CCD IMAGE SENSOR
HIGH DYNAMIC RANGEHOT PIXEL DEVELOPMENTHIGH DYNAMIC RANGE (HDR)
IMAGE SIGNAL PROCESSINGIMAGING SYSTEMSIMAGE QUALITYIMAGE SENSORINFRAREDIMAGE SENSORSIMAGE INTERPRETATION BY MACHINESIMAGER DEFECT DETECTION
JOINT GEOMETRIC CALIBRATIONJOINT IMAGE UP-SAMPLINGJOINT IMAGE DENOISING
LOCK-IN DETECTIONLOCK-IN PIXELLOW ACCELERATION VOLTAGELATERAL-ELECTRIC-FIELD CHARGE MODULATORLINEARITY
MULTI-APERTUREMOTION ENCODERMULTISPECRAL IMAGINGMAXIMUM LIKELIHOOD ESTIMATIONMEDICAL IMAGING
NEGATIVE GATE BIASLESSNEAR-SENSOR IMAGE PROCESSING
PIXELSPHOTODIODESPHOTON SHOT NOISEPHOTON TRANSFER NOISE ANALYSIS
ROUND SENSORRTS NOISE
SMART PIXELS SENSORSINGLE-CHIP IMAGINGSMART IMAGE SENSORSSHOT-NOISESTEEP PN JUNCTION SI DIODESPECKLESIGNAL TO NOISE RATIOSTOP MOTIONSEMI-PHOTON-COUNTING-LEVEL CMOS IMAGE SENSOR
TRAP LEAKAGE RATETIME-RESOLVED IMAGE SENSORTHERMAL GENERATION OF DARK SIGNALTHERMAL IMAGINGTRAP CAPACITY
ULTRA-HIGH SENSITIVITY CAMERAULTRAHIGH DEFINITION (UHDTV)
VOLTAGE MODE
WIDE DYNAMIC RANGE (WDR)
1 MICRON PIXELS133-MEGAPIXEL
8K SUPER HI-VISION (SHV)
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  26  1
Image
Pages 1 - 6,  © Society for Imaging Science and Technology 2017
Digital Library: EI
Published Online: January  2017
  137  17
Image
Pages 7 - 13,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

This paper presents a novel joint geometric camera calibration system using a novel calibration target for a visible and a far-infrared (FIR) cameras. By using the proposed calibration target which is the two-layer structure with different combinations of thermal emission, we can stably and precisely obtain the corresponding points of the checker pattern in the calibration target from the visible and the FIR images. The simple calibration algorithm based on the well-known Zhang's algorithm can accurately estimate the camera parameters, because we can use many useful tools which contribute the accuracy. Experimental results show that the proposed calibration system enables us to easily calibrate the visible and the FIR image with high accuracy compared with an existing system. Furthermore, the proposed system can lead to develop various applications including joint image denoising, and joint image up-sampling.

Digital Library: EI
Published Online: January  2017
  17  2
Image
Pages 14 - 17,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

In this work, Si pn junction diode-based electron beam detector with high sensitivity for low acceleration voltage and high readout speed is reported, by using steep pn junction formation technology, low dopant concentration Si substrate and multiple signal outputs. The electron quantum efficiency of fabricated detector at acceleration voltage of 1.0kV, 10kV, 20kV are 51.8%, 70.3% and 90.8%, respectively, which is suitable for low acceleration voltage scanning electron microscope. Also, by dividing the detector area into multiple regions, the pn junction capacitance is significantly reduced to 1/3 and 1/7 compared to the conventional structure, which is suitable for high signal readout speed that is limited by RC delay of pn junction.

Digital Library: EI
Published Online: January  2017
  40  12
Image
Pages 18 - 24,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

We have developed an 8K "full-resolution," 60-fps, portable camera system using a 133-megapixel complementary metaloxide-semiconductor (CMOS) single-chip image sensor. The camera head weighs less than 7 kg, whereas the conventional 8K full-resolution three-chip camera weighs over 50 kg. The new camera can use both commercial 35-mm full-frame lenses and super 35-mm lenses by using lens adapters. It employs a compact 100-Gbps optical transceiver that can transmit the 8K fullresolution video signal to the camera control unit (CCU). The size of the CCU is 3U, which is comparable to CCUs used for broadcasting high definition television (HDTV) cameras. The camera supports the wide-color-gamut and high dynamic range (HDR) video formats, which were standardized in ITU-R BT. 2020 and BT. 2100, respectively. Moreover, a streaking noise correction circuit is implemented in the CCU. The 8K signal output interface from the CCU is compliant with the ITU-R BT. 2077 (U-SDI) standard. By performing an image shooting experiment, we confirmed that the limiting resolution of this camera was more than 4000 TV lines and the signal-to-noise (S/N) ratio was 57 dB at a sensitivity of F4.0/2000 lux.

Digital Library: EI
Published Online: January  2017
  24  4
Image
Pages 25 - 32,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

This paper will demonstrate the filter selection methods for wide band multispectral capturing system considering spectral and colorimetric reproduction as well as noise propagation. Spectral sensitivity of seven channel bandpass filter set was modeled and optimized first. Schott filters can be glued together to have bandpass shapes, which can be used to build the spectral camera. The glued Schott filters were selected based on the optimal modeling spectral sensitivity considering optical throughputs and infrared sensitivity. The second method to select the glued Schott filters is to divide the spectrum of interest evenly and select the combinations of filters whose peak wavelength were located in the range of spectrum subsets manually. An alternative option is to use single Schott filter set to build the spectral camera. However, although its spectral and colorimetric reproduction is accurate, single Schott filter set generates high propagated noise. Therefore, the glued Schott filters are preferred. The research provides insights for filter selection in multi-spectral camera design.

Digital Library: EI
Published Online: January  2017
  25  0
Image
Pages 33 - 38,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

We propose to analyze in details the performances of an ASIC dedicated to the real-time analysis of speckle patterns statistics. This IC calculates average statistical values over the whole pixel array, and outputs only these values instead of a whole image: such on-chip calculation achieves the high acquisition rates required to follow speckle patterns from thick living tissue, without additional noises usually associated with fast data transfer. We want to assess if our device can reach its shot-noise limit, which is the shot-noise limit on one pixel divided by the square root of the number of pixels.

Digital Library: EI
Published Online: January  2017
  27  3
Image
Pages 39 - 45,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

Research has shown that in digital imaging sensors "Hot Pixels" defects accumulate as the camera ages over time. We have previously developed an empirical formula that projects hot pixel defects growth rates in terms of defect density (defects/year/mm2). We found that hot pixel densities grow via a power law, with the inverse of the pixel size raised to the power of about 3, and the ISO (gain) raised to the power of about 0.5. This paper experimentally explores the defect rates as pixels approach the 2 to 1 micron size. An analysis of the hot pixel parameters statistics shows that stuck high pixels that develop in the field are actually stuck hot pixels. In addition, this analysis indicates that as pixels shrink, not only does the defect rate increase, but it produces both a larger number of weak hot pixels at all ISOs, and a larger number of strong hot pixels at higher ISOs.

Digital Library: EI
Published Online: January  2017
  96  4
Image
Pages 46 - 51,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

An octagonal shaped CMOS image sensor (CIS) has been developed for endoscopic applications. The octagonal shape of the outlined die is also applied to the pixel matrix which has suppressed corners, resulting in an octagonal pixel matrix of 422'640 effective pixels. The sensor die fits on a circumference of 3.2 mm diameter being this the best die cut ratio between the cut corners and the pixel placement. The missing pixels on the corners are internally compensated by the readout electronics to maintain a rectangular image output format of 680x680 pixels. This paper presents the solutions found to overcome the layout challenges of fitting both row and column logic on the same side of the diagonally cut corners. Furthermore, the sensor features an area efficient column parallel ADC converter, having on the column readout side, only 402 μm overhead total space between the utmost pixel row until the edge of the silicon die. This space is used to place CDS, ADC, column addressing, readout, additional electronics and power routing. The sensor also has a fully autonomous operation, requiring only an external clock supply to drive the internal state machine. The interface requires just 6 connections: 2 for power supply, 2 for bidirectional data and 2 for main clock supply. The frame rate and the exposure are configurable by register. The maximum frame rate is 50 frames per second (FPS) and data is delivered over LVDS serial data link. The integration time can be configured from 147 μs to 20.1 ms. The power supply is 3.3 V with internal Power-On-Reset (POR) and has a power consumption of 91 mW manufactured in 180 nm CIS process.

Digital Library: EI
Published Online: January  2017
  47  4
Image
Pages 52 - 63,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

Differential Binary Pixel Technology is a threshold-based timing, readout and image reconstruction method that utilizes sub-frame partial charge transfer technique in a standard four-transistor (4T) pixel CMOS Image sensor (CIS) to achieve HDR video with Stop Motion. This technology improves low light signal-tonoise ratio (SNR) by up to 21dB. The method is verified in silicon using a TSMC 65nm 1.1μm pixel technology 1 megapixel (MP) test chip array and is compared with a traditional 4× oversampling technique using full charge transfer. The test chip is also compared with the iPhone 6s rear view camera to show superior HDR video capability.

Digital Library: EI
Published Online: January  2017
  25  0
Image
Pages 64 - 67,  © Society for Imaging Science and Technology 2017
Volume 29
Issue 11

This paper reports high time-resolved imaging technique using a lateral electric field charge modulator with bipolar-gates. The proposed pixel structure achieved high time-resolved signal detection by using negative bias effect by work function difference between the p-type gate and p-substrate. The test chip fabricated in 0.11 um CIS technology demonstrates the high-speed charge modulation, and the modulation contrast is measured to be 97%.

Digital Library: EI
Published Online: January  2017

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