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Volume: 33 | Article ID: art00007
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A Low-Voltage 0.7 µm Pixel with 6000 e- Full-Well Capacity for a Low-Power CMOS Image Sensor
Seung-Wook Lee
Seungwon Cha
Dongyoung Jang
Mihye Kim
Haewon Lee
Nakyung Lee
Seonok Kim
Kwanyoung Oh
Daehyung Lee
SeungHan Hong
Hana Lee
Sunghoon Oh
Donghyuk Park
Yitae Kim
JungChak Ahn
  DOI :  10.2352/ISSN.2470-1173.2021.7.ISS-091  Published Online :  January 2021
Abstract

A low-voltage pixel with 0.7 µm pitch was designed for a low-power CMOS image sensor. By reducing a pixel power supply voltage (Vpix), power consumption for pixel was reduced, but full-well capacity (FWC) was also decreased. However, by lowering the conversion gain (CG) and applying a negative voltage to the ground (NGND) of the pixel, FWC of 6000 e- was achieved without any degradation of both charge transfer lags and backflow noise. In addition, the signal linearity in the reduced analog-to-digital (ADC) range was improved by optimizing the source follower (SF). For dark performances, white spots and dark current worsened by NGND were significantly improved by forcing more negative voltage to the transfer gate (TG) when it was turned off.

Journal Title : Electronic Imaging
Publisher Name : Society for Imaging Science and Technology
Publisher Location : IS&T 7003 Kilworth Lane Springfield, VA 22151 USA
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 DOI 10.2352/ISSN.2470-1173.2021.7.ISS-091
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Seung-Wook Lee, Seungwon Cha, Dongyoung Jang, Mihye Kim, Haewon Lee, Nakyung Lee, Seonok Kim, Kwanyoung Oh, Daehyung Lee, SeungHan Hong, Hana Lee, Sunghoon Oh, Donghyuk Park, Yitae Kim, JungChak Ahn, "A Low-Voltage 0.7 µm Pixel with 6000 e- Full-Well Capacity for a Low-Power CMOS Image Sensor"  in Proc. IS&T Int’l. Symp. on Electronic Imaging: Imaging Sensors and Systems,  2021,  pp 91-1 - 91-6,  https://doi.org/10.2352/ISSN.2470-1173.2021.7.ISS-091

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Copyright © Society for Imaging Science and Technology 2021
72010604
Electronic Imaging
2470-1173
Society for Imaging Science and Technology
IS&T 7003 Kilworth Lane Springfield, VA 22151 USA
10.2352/ISSN.2470-1173.2021.7.ISS-091
2470-1173(20210118)2021:7L.911;1-
ei_24701173_v2021n7_Input/s3.xml
/ist/ei/2021/00002021/00000007/art00007
Articles
A Low-Voltage 0.7 µm Pixel with 6000 e- Full-Well Capacity for a Low-Power CMOS Image Sensor
LeeSeung-Wook
ChaSeungwon
JangDongyoung
KimMihye
LeeHaewon
LeeNakyung
KimSeonok
OhKwanyoung
LeeDaehyung
HongSeungHan
LeeHana
OhSunghoon
ParkDonghyuk
KimYitae
AhnJungChak
18012021
2021
7
91-1
91-6
2021
A low-voltage pixel with 0.7 µm pitch was designed for a low-power CMOS image sensor. By reducing a pixel power supply voltage (Vpix), power consumption for pixel was reduced, but full-well capacity (FWC) was also decreased. However, by lowering the conversion gain (CG) and applying a negative voltage to the ground (NGND) of the pixel, FWC of 6000 e- was achieved without any degradation of both charge transfer lags and backflow noise. In addition, the signal linearity in the reduced analog-to-digital (ADC) range was improved by optimizing the source follower (SF). For dark performances, white spots and dark current worsened by NGND were significantly improved by forcing more negative voltage to the transfer gate (TG) when it was turned off.
Low voltage 0.7μm pixelLow power CMOS Image SensorFull-well capacitySignal linearityNegative ground