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Volume: 29 | Article ID: art00007
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ICA-based background subtraction method for an FPGA-SoC
  DOI :  10.2352/ISSN.2470-1173.2017.13.IPAS-203  Published OnlineJanuary 2017
Abstract

This work presents a background subtraction method based on Independent Components Analysis (ICA) implemented on a Field-Programmable Gate Array (FPGA) System-on-a-Chip (SoC) with an embedded processor. A previous work showed background subtraction utilizing ICA achieves better results than Mixture Of Gaussians (MOG) when the background is dynamic. However, that approach was developed for a computer and its proposed mean of using ICA is too complex, requiring a high-end computer for implementation. With the purpose of extending this approach to current embedded vision systems, a method is developed for an FPGA-SoC with embedded processor. This recent technology complements the parallelism of FPGAs with the general purpose computing of processors, maintaining a small footprint and a low power consumption. In this work, background is continuously updated by estimating the mean with Expectation-Maximization (EM), foreground is extracted via FastICA, and movement is determined by a threshold based on standard deviation. The herein presented approach to these algorithms allows exploiting the architecture of FPGA-SoCs, however, there are alternatives which could replace these algorithms. The developed method was tested on two image sequences and the accuracy of movement detection was measured by the precision and the recall.

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Fernando Carrizosa-Corral, Alberto Váazquez-Cervantes, Josué-Rafael Montes, Teresa Hernández-díaz, Leonardo Barriga-Rodríguez, Jorge Alberto Soto-Cajiga, Hugo Jiménez-Hernández, "ICA-based background subtraction method for an FPGA-SoCin Proc. IS&T Int’l. Symp. on Electronic Imaging: Image Processing: Algorithms and Systems XV,  2017,  pp 36 - 41,  https://doi.org/10.2352/ISSN.2470-1173.2017.13.IPAS-203

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Copyright © Society for Imaging Science and Technology 2017
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Electronic Imaging
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